1.Guide layout engineer to complete and optimize the layout 2.Support Test/Product team with chip debugging, failure analysis, characterizations, etc.1.BS or MS in EE, or related fields; Master degree preferred 3+ / 5+ years of experience on analog IC design 2.Good understanding of CMOS process technologies and device physics 3.Deep knowledge and Good Design skills of analog blocks, such as Bandgap, LDO, PLLs, Pump, OSC, high-resolution data converters(DAC/ADC), power supply regulators, etc 4.Familiar with EDA tools, such as Cadence Virtuoso, HSPICE, FSIM/HSIM/XA (or equivalent transistor level circuit simulator), etc 5.Familiar with "script" language, such as Shell, Perl, Python, etc 6.Good experience on LCD/AMOLED Display driver IC is a plus 7.Highly organized and self-motivated Good communication skills and team work spirit